Tsev > Exhibition > Ntsiab lus

Npaj-txheej txheem ntawm lub rooj sib tham ntawm cov rooj sib tham

Mar 11, 2019

Mus rau ASICs

Keeb kwm, FPGAs tau qeeb qeeb, tsawg dua zog thiab feem ntau tau ua haujlwm tsis zoo dua li lawv cov ASIC cov sib liam. Ib txoj kev tshawb nrhiav tau pom tias cov qauv tsim tawm ntawm FPGAs xav tau 40 xuabmoos ntau thaj chaw, kos 12 zaug zog npaum li qub, thiab khiav ntawm ib feem peb qhov kev ceev ntawm cov kev coj ua ASIC.


Tsis ntev los no, FPGAs xws li Xilinx Virtex-7 lossis Altera Stratix 5 tau tuaj sib tw nrog ASIC thiab ASSP ("Ib qhov tshwj xeeb ntawm daim ntawv thov", xws li ib lub cav ntim ntawm USB standalone) los ntawm kev muab txo hwj chim siv, ntau zog ceev, txo cov ntaub ntawv nqi, tsawg siv real-estate, thiab nce ntxiv rau kev kho dua tshiab "on-the-fly". Qhov uas yav dhau los tus qauv tsim muaj 6 txog 10 ASICs, tib lub qauv tsim tau tam sim no ua tiav siv ib qho FPGA nkaus xwb.


Cov txiaj ntsig ntawm FPGAs muaj peev xwm rov tau txais kev pab cuam thaum twg twb tau npaj (piv txwv tias "nyob rau hauv thaj chaw") los kho cov yoov, thiab feem ntau muaj sij hawm luv luv rau kev ua lag luam thiab txo cov nqi tsis kho dua qub dua qub. Cov neeg muag khoom tseem tuaj yeem siv txoj hauv kev nruab nrab ntawm FPGA prototyping: tsim lawv cov khoom kho hluav taws xob hauv FPGAs, tab sis siv lawv cov ntaub ntawv ua tiav raws li ASIC kom nws tsis raug hloov tom qab tsim tau.


Tiam sis


Xilinx tau thov tias ntau lub lag luam thiab kev lag luam ntawm kev ua haujlwm hloov cov ASIC / FPGA lub rooj sib txoos raws li ntawm Lub Ob Hlis 2009:


Cov nqi ntawm kev txhim kho hluav taws xob tau nce siab heev

ASIC complexity tau ncua sij hawm kev txhim kho

R & D cov kev pab thiab lub headcount tau poob

Cov nyiaj tau los qis rau qeeb-mus-lag luam tau nce

Kev tswj hwm nyiaj txiag hauv kev lag luam tsis muaj nyiaj tau tsav tsheb tsawg.

Cov qauv no ua rau FPGAs zoo dua lwm qhov tshaj li ASICs rau ntau dua cov ntaub ntawv ntau dua qhov siv tau ntau tshaj li qhov lawv tau siv yav dhau los siv rau, uas lub tuam txhab muab tus zauv ntxiv ntawm FPGA tsim pib.


Qee cov FPGAs muaj peev xim ntawm ib qho rov qab sib kho uas cia ib feem ntawm lub cuab yeej tau rov ua tiav thaum lwm qhov ntxiv mus.



Cov twj nruab suab muaj suab paj nruag (Complicable programmable devices) (CPLD)

Qhov kev sib txawv ntawm qhov cov cuab yeej tsim kho logic (CPLDs) thiab FPGAs yog cov qauv vaj tse. Ib tug CPLD muaj cov qauv kev txwv nruj uas muaj los ntawm ntau tshaj ib qho lossis ntau ntau ntawm cov khoom siv logic-cov-khoom-cov khoom logic cov khoom noj ib qho tsawg tsawg ntawm cov npe teev. Yog li ntawd, CPLDs tsis yoog kom yooj yim dua, tiam sis yuav tsum muaj qhov kom zoo dua ntawm cov sij hawm qeeb thiab ntau dua qhov sib txawv ntawm cov FPGA architectures, ntawm qhov kev sib tshuam, muaj kev cuam tshuam ntawm kev sib nkag. Qhov no ua rau lawv xav tau ntau dua (qhov ntau ntawm cov qauv tsim tawm uas yuav siv rau lawv), tiam sis tseem ua ntau txoj hauv kev tsim rau, los yog tsawg kawg yuav tsum tsim hluav taws xob tsim hluav taws xob (EDA) software.


Hauv kev xyaum, qhov kev sib txawv ntawm FPGA thiab CPLDs feem ntau yog ib qhov loj me li FPGAs feem ntau loj dua cov kev pab cuam dua li CPLDs. Feem ntau tsuas yog FPGAs muaj ntau txheej embedded xws li adders, multipliers, nco, thiab serializer / deserializers. Ib qho kev tsim tshwj xeeb yog tias CPLDs muaj cov cim flash embedded nco cia lawv cov teeb meem thaum FPGAs feem ntau yuav tsum tau sab nrauv tsis-volatile nco (tab sis tsis nco ntsoov).


Thaum tsim tus qauv yuav tsum tau yooj yim kiag rau (logic yog twb tau teeb tsa lub hwj huam) CPLDs feem ntau nyiam. Rau ntau daim ntawv thov FPGAs feem ntau nyiam. Qee zaum ob qho CPLDs thiab FPGAs raug siv hauv ib qho tsim tsim. Hauv cov qauv no, CPLDs feem ntau ua cov ntsiab lus ntawm lo lus nplaum, thiab muaj lub luag haujlwm "booting" FPGA thiab tswj kev pib dua thiab khau raj ntawm lub rooj sib tham tag nrho ntawm lub rooj tsav xwm. Yog li, nyob ntawm daim ntawv thov nws yuav ua tau siv cov FPGA thiab CPLDs hauv ib qho tsim.

Kev xav txog kev ruaj ntseg

FPGAs muaj ob qho kev ua tau zoo thiab tsis zoo li piv rau ASIC lossis ruaj ntseg microprocessors, txog kev ruaj ntseg kho vaj tse. FPGAs 'ua kom hloov siab phem thaum lub sij hawm tsim kev pheej hmoo. Yav dhau los, rau ntau tus FPGAs, tus tsim tsim tau qes me ntsis thaum lub FPGA nws los ntawm lwm tus nco (feem ntau ntawm txhua lub zog-rau). Tag nrho cov neeg muag khoom loj FPGA tam sim no muab ib lub spectrum ntawm kev ruaj ntseg kev daws teebmeem rau cov neeg tsim qauv xws li kev tshuav muaj npe ntawm lo lus nug thiab cov ntawv pov thawj. Piv txwv, Altera thiab Xilinx muab AES encryption (mus txog 256-ntsis) rau cov khoom noj uas cia rau hauv lwm lub cim xeeb flash.


FPGAs uas khaws lawv cov teeb tsa hauv kev siv ntiag tug flash nco, xws li Microsemi ProAsic 3 los yog Lattice's XP2 programmable devices, tsis txhob qhia qhov kev yau thiab tsis xav encryption. Tsis tas li ntawd, flash nco rau ib lub rooj lookup muab ib qho kev tshwm sim tiv thaiv kev tiv thaiv rau qhov chaw sau ntawv. Cov neeg xav tau kev lees paub ntau dua ntawm kev tiv thaiv kev tiv thaiv tuaj yeem siv sau-ib zaug, tshuaj tiv thaiv FPGA los ntawm cov neeg muag khoom xws li Microsemi.


Nrog nws Stratix 10 FPGAs thiab SoCs, Altera tau qhia tus Thawj Coj Ncaj Ncees ruaj ntseg thiab lub cev ua haujlwm tsis txaus ntseeg kom muaj kev tiv thaiv ntawm kev tiv thaiv lub cev.


Hauv xyoo 2012 neeg tshawb nrhiav Sergei Skorobogatov thiab Christopher Woods tau qhia tias FPGA yuav ua rau cov neeg siab phem tsis kam. Lawv nrhiav tau ib qho tseem ceeb heev rau sab nraud tau tsim nyob rau hauv silicon ua ib feem ntawm Actel / Microsemi ProAsic 3 ua nws lam tau lam ua rau ntau theem xws li reprogramming crypto thiab nkag rau hauv lub lag luam, nkag unencrypted bitstream, modifying low-grade silicon nta, thiab extracting configuration ntaub ntawv.