Tsev > Exhibition > Ntsiab lus

Lwm yam coprocessors

Mar 14, 2019
  • Lub MIPS architecture txhawb txog li plaub tus qauv kev sib txuas lus, siv rau kev tswj hwm, ntiv taw tes, thiab ob lub tshuab tsis txheeb tsis meej rau lwm cov dej num xws li graphics accelerators.

  • Siv FPGA (field-programmable gate arrays), kev cai coprocessors tuaj yeem tsim rau kev ua haujlwm ntawm kev ua haujlwm xws li cov teebmeem digital (xws li Zynq, combines ARM cores nrog FPGA ntawm ib tus tuag xwb).

  • TLS / SSL accelerators, siv rau cov servers; xws li cov tsom iav siv los ua cov ntawv teev lus, tab sis nyob hauv cov sij hawm niaj hnub no yog cov lus qhia rau crypto hauv mainstream CPUs.

  • Qee cov tub ntxhais feem ntau chips tau programmed kom tau ib qho ntawm lawv cov txheej txheem yog thawj tus processor, thiab lwm cov txheej txheem yog cov txhawb nqa coprocessors.

  • China's Matrix 2000 128 core PCI-e coprocessor yog ib tus qauv accelerator uas yuav tsum muaj CPU khiav nws, thiab tau ua hauj lwm hauv kev hloov tshiab ntawm 17,792 ntawm Tianhe-2 supercomputer (2 Intel Knights Choj + 2 Matrix 2000 txhua), tam sim no dubbed 2A , roughly doubling nws ceev ntawm 95 petaflops, tshaj lub ntiaj teb tus ceev tshaj supercomputer.

  • Ib qho ntawm cov tshuab coprocessors tau tsim muaj rau Cov Kev Muag Qub BBC Micro computers. Tsis yog cov khoom siv tshwj xeeb los yog cov cuab yeej siv, lawv yog cov hom phiaj CPUs (xws li 8086, Zilog Z80, los yog 6502) rau hom kev ua hauj lwm raug muab los ntawm kev khiav hauj lwm, tso tawm los ntawm lub computer lub ntsiab CPU thiab ua rau kev ua kom acceleration. Ntxiv mus, tus BBC Micro ntsuas nrog ib tus coprocessor tau khiav tshuab code software tsim rau lwm lub tshuab, xws li CP / M thiab DOS uas yog sau rau 8086 processors.