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Kev kaw lus ntawm ib tug nti (SoCs) Intermodule kev sib txuas lus

Mar 08, 2019

Systems-on-chip comprise ntau tua units. Cov koog no yuav tsum xa cov ntaub ntawv thiab cov lus qhia rov los. Vim li no, tag nrho, tiam sis feem ntau tsis sib tw SoCs xav tau kev sib txuas lus kev sib txuas lus. Tseem siv lwm lub tshuab siv microcomputer, tiam sis tsis ntev los no tsim los ntawm cov kev sib txuas ntawm cov kev sib txuas ntawm cov kev sib txuas lus hauv Network (onCounter-on-Chip (NoC) tau nce siab thiab muaj peev xwm tshaj tawm caij tsheb npav vaj tse rau SoC tsim yav tom ntej .


Kev sib txuas lus hauv tsheb npav

Keebkwm, ib lub sijhawm siv computer thoob tebchaws sib txuas rau feem sib txawv ntawm lwm yam, hu ua "blocks" ntawm qhov System-on-Chip. Lub npav sib txuas ntawm lub kaw lus sib txuas rau hauv kev sib txuas lus yog ARM's tsis pub muaj kev cai raus dej dawb Microcontroller Bus Architecture (AMBA) txuj.


Ncaj nraim kev saib xyuas kev tswj cov kev sib txuas ntawm sab nraud interfaces thiab SoC nco, bypassing CPU los yog tswj unit, ua li ua cov ntaub ntawv nkag mus ntawm lub system-on-nti. Qhov no zoo li ib co tsav tsheb ntawm cov khoom ua nyob ntawm kev tivthaiv ntau tus ntiv tes xoo mod hauv lub computer architectures.


Lub tsheb npav hauv computer tsuas yog siv rau ntawm scalability, txhawb tsuas yog txog li kaum tawm cores (multicore) ntawm ib zaug xwb nti. Kev ncua sij hawm ntawm lub qe yuav tsis qis vim kev txuas ntxiv los ntawm cov qauv kev txuas ntxiv, kev ua haujlwm tsis teev nrog cov cores uas txuas nrog, SoC txoj haujlwm khiav ceev yuav tsum txo qis nrog txhua tus tub ntxhais txuas ntxiv kom muaj zog, thiab ntev xov xwm ntau dua cov hluav taws xob. Cov kev cov nyom no txwv tsis pub txhawb ntau lub tshuab hauv chip.


Network-rau-nti

Main tsab xov xwm: Network rau ib tug nti

Nyob rau xyoo 2010s, ib qho kev sib txuas ntawm tshuab-rau-nti siv kev sib txuas lus hauv kev sib txuas lus hauv kev sib txuas ntawm lub network zoo li topology tsis yog kev caij tsheb raws li tau tshwm sim. Ib tug qauv ntawm ntau lub tshuab cores rau SoCs tau tshwm sim rau ntawm qhov kev sib txuas lus ntawm kev sib txuas lus los ua ib qho ntawm cov tseem ceeb hauv kev txiav txim siab txog kev ua tau zoo thiab nqi. Qhov no tau coj mus rau qhov kev sib txuas ntawm cov tes hauj lwm sib txuas nrog cov chaw nruab nrab ntawm router uas yog hu ua "networks on chip" (NoCs) los daws cov teeb meem ntawm cov kev siv tsheb npav.


Networks-on-chip muaj qhov zoo xws li cov hom phiaj-thiab kev thov kev khi lus, qhov muaj peev xwm loj dua thiab txo cov tsheb sib cav. Network-on-chip architectures coj kev tshoov siab los ntawm kev sib tham kev sib tham xws li TCP thiab Internet sib kho suite rau kev sib txuas lus-nti, tab sis lawv feem ntau muaj tsawg dua cov txheej pov tseg. Qhov zoo tshaj plaws network-on-nti network architectures yog ib qho chaw tsis tu ncua ntawm kev tshawb nrhiav ntau yam. NoC architectures ntau los ntawm cov khoom siv sib txuas los ntawm cov khoom lag luam sib txuas xws li torus, hypercube, meshes thiab tsob ntoo ntoo rau kev tshuaj ntsuam genetic algorithm randomized algorithms xws li random mus taug kev nrog branching thiab randomized lub sij hawm nyob (TTL).


Muaj coob tus neeg tshawb fawb SoC xav txog NoC architectures los ua rau yav tom ntej ntawm tus qauv tsim-vim-lawv tau pom tias muaj peev xwm ua kom tau raws li kev siv zog thiab kev xav tau ntawm SoC designs. Tam sim no NoC architectures yog ob seem. 2D IC tsim muaj kev txwv tsis pub muaj kev xaiv kom muaj ntau li cov cores nyob hauv SoCs nce, yog li cov txheej txheem 3-dimensional integrated circuits (3DICs), SoC designers tab tom nrhiav kev tsim cov thev naus laus zuj zus tes hauj lwm hu ua 3DNoCs.