Tsev > Xov xwm > Ntsiab lus

FT_Gpu_Hal.h

May 06, 2019

#ifndef FT_GPU_HAL_H

#define FT_GPU_HAL_H


typedef enum {

FT_GPU_I2C_MODE = 0,

FT_GPU_SPI_MODE,


FT_GPU_MODE_COUNT,

FT_GPU_MODE_UNKNOWN = FT_GPU_MODE_COUNT

} FT_GPU_HAL_MODE_E;


typedef enum {

FT_GPU_HAL_OPENED,

FT_GPU_HAL_READING,

FT_GPU_HAL_WRITING,

FT_GPU_HAL_CLOSED,


FT_GPU_HAL_STATUS_COUNT,

FT_GPU_HAL_STATUS_ERROR = FT_GPU_HAL_STATUS_COUNT

} FT_GPU_HAL_STATUS_E;


typedef struct {

union {

ft_uint8_t spi_cs_pin_no;

ft_uint8_t i2c_addr;

};

union {

ft_uint16_t spi_clockrate_khz; // Nyob rau hauv KHz

ft_uint16_t i2c_clockrate_khz; // Nyob rau hauv KHz

};

ft_uint8_t channel_no;

} Ft_Gpu_Hal_Config_t;


typedef struct {

ft_uint8_t reserved;

} Ft_Gpu_App_Context_t;


typedef struct {

/ * Tag nrho cov naj npawb raws rau libmpsse * /

ft_uint32_t TotalChannelNum;

} Ft_Gpu_HalInit_t;


typedef enum {

FT_GPU_READ = 0,

FT_GPU_WRITE,

} FT_GPU_TRANSFERDIR_T;


typedef struct {

ft_uint32_t ntev; // IN thiab tawm

ft_uint32_t chaw nyob;

ft_uint8_t * tsis tuaj;

} Ft_Gpu_App_Transfer_t;


typedef struct {

Ft_Gpu_App_Context_t app_header;

Ft_Gpu_Hal_Config_t hal_config;


ft_uint16_t ft_cmd_fifo_wp; // coprocessor fifo sau pointer

ft_uint16_t ft_dl_buff_wp; // display command nco sau pointer


FT_GPU_HAL_STATUS_E txheej xwm; // tawm

ft_void_t * hal_handle; // IN / tawm

} Ft_Gpu_Hal_Context_t;


/ * Qhov yooj yim APIs Theem 1 * /

ft_bool_t Ft_Gpu_Hal_Init (Ft_Gpu_HalInit_t * halinit);

ft_bool_t Ft_Gpu_Hal_Open (Ft_Gpu_Hal_Context_t * party);


/ * Cov APIs rau kev nyeem ntawv / kev sau ntaub ntawv tsis tu ncua tsuas yog siv me me xwb * /

ft_void_t Ft_Gpu_Hal_StartTransfer (Ft_Gpu_Hal_Context_t * host, FT_GPU_TRANSFERDIR_T rw, ft_uint32_t addr);

ft_uint8_t Ft_Gpu_Hal_Transfer8 (Ft_Gpu_Hal_Context_t * host, ft_uint8_t tus nqi);

ft_uint16_t Ft_Gpu_Hal_Transfer16 (Ft_Gpu_Hal_Context_t * host, ft_uint16_t tus nqi);

ft_uint32_t Ft_Gpu_Hal_Transfer32 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t tus nqi);

ft_void_t Ft_Gpu_Hal_EndTransfer (Ft_Gpu_Hal_Context_t * party);


/ * Nyeem & Sau ntawv APIs rau ob lub nro tawg thiab tib qho hloov, nyob ntawm qhov tsis zoo lis * /

ft_void_t Ft_Gpu_Hal_Read (Ft_Gpu_Hal_Context_t * host, Ft_Gpu_App_Transfer_t * hloov);

ft_void_t Ft_Gpu_Hal_Write (Ft_Gpu_Hal_Context_t * host, Ft_Gpu_App_Transfer_t * hloov);


ft_void_t Ft_Gpu_Hal_Close (Ft_Gpu_Hal_Context_t * party);

ft_void_t Ft_Gpu_Hal_DeInit ();


/ * Pabcov kev ua haujlwm API Nyeem * /

ft_uint8_t Ft_Gpu_Hal_Rd8 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr);

ft_uint16_t Ft_Gpu_Hal_Rd16 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr);

ft_uint32_t Ft_Gpu_Hal_Rd32 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr);


/ * Pabcov kev ua haujlwm API sau * /

ft_void_t Ft_Gpu_Hal_Wr8 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, ft_uint8_t v);

ft_void_t Ft_Gpu_Hal_Wr16 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, ft_uint16_t v);

ft_void_t Ft_Gpu_Hal_Wr32 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, ft_uint32_t v);


/ **************************************************************************************************** **************************** /

/ **************************************************************************************************** **************************** /

/ * APIs rau tus xibfwb Fifo nyeem ntawv / sau ntawv thiab chaw tswj * /

ft_void_t Ft_Gpu_Hal_Updatecmdfifo (Ft_Gpu_Hal_Context_t * host, ft_uint16_t suav);

ft_void_t Ft_Gpu_Hal_WrCmd32 (Ft_Gpu_Hal_Context_t * host, ft_uint32_t cmd);

ft_void_t Ft_Gpu_Hal_WrCmdBuf (Ft_Gpu_Hal_Context_t * host, ft_uint8_t * buffer, ft_uint16_t suav);

ft_void_t Ft_Gpu_Hal_WaitCmdfifo_empty (Ft_Gpu_Hal_Context_t * party);

ft_void_t Ft_Gpu_Hal_ResetCmdFifo (Ft_Gpu_Hal_Context_t * party);

ft_void_t Ft_Gpu_Hal_CheckCmdBuffer (Ft_Gpu_Hal_Context_t * host, ft_uint16_t suav);


ft_void_t Ft_Gpu_Hal_ResetDLBuffer (Ft_Gpu_Hal_Context_t * party);


ft_void_t Ft_Gpu_Hal_StartCmdTransfer (Ft_Gpu_Hal_Context_t * host, FT_GPU_TRANSFERDIR_T rw, ft_uint16_t suav);


ft_void_t Ft_Gpu_Hal_Powercycle (Ft_Gpu_Hal_Context_t * party, ft_bool_t li);


/ **************************************************************************************************** **************************** /

/ **************************************************************************************************** **************************** /

/ * APIs rau Lub Hawm Txiav Txim * /

typedef enum {

FT_GPU_INTERNAL_OSC = 0x48, // default

FT_GPU_EXTERNAL_OSC = 0x44,

} FT_GPU_PLL_SOURCE_T;

typedef enum {

FT_GPU_PLL_48M = 0x62, // default

FT_GPU_PLL_36M = 0x61,

FT_GPU_PLL_24M = 0x64,

} FT_GPU_PLL_FREQ_T;


typedef enum {

FT_GPU_ACTIVE_M = 0x00,

FT_GPU_STANDBY_M = 0x41, // default

FT_GPU_SLEEP_M = 0x42,

FT_GPU_POWERDOWN_M = 0x50,

} FT_GPU_POWER_MODE_T;


#define FT_GPU_CORE_RESET (0x68)


ft_int32_t hal_strlen (const ft_char8_t * s);

ft_void_t Ft_Gpu_Hal_Sleep (ft_uint16_t ms);

ft_void_t Ft_Gpu_ClockSelect (Ft_Gpu_Hal_Context_t * host, FT_GPU_PLL_SOURCE_T pllsource);

ft_void_t Ft_Gpu_PLL_FreqSelect (Ft_Gpu_Hal_Context_t * host, FT_GPU_PLL_FREQ_T freq);

ft_void_t Ft_Gpu_PowerModeSwitch (Ft_Gpu_Hal_Context_t * host, FT_GPU_POWER_MODE_T pwrmode);

ft_void_t Ft_Gpu_CoreReset (Ft_Gpu_Hal_Context_t * party);

ft_void_t Ft_Gpu_Hal_StartTransfer (Ft_Gpu_Hal_Context_t * host, FT_GPU_TRANSFERDIR_T rw, ft_uint32_t addr);

ft_void_t Ft_Gpu_Hal_WrMem (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, const ft_uint8_t * tsis, ft_uint32_t ntev);

ft_void_t Ft_Gpu_Hal_WrMemFromFlash (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, const ft_prog_uchar8_t * tsis, ft_uint32_t ntev);

ft_void_t Ft_Gpu_Hal_WrCmdBufFromFlash (Ft_Gpu_Hal_Context_t * host, FT_PROGMEM ft_prog_uchar8_t * tsis, ft_uint16_t suav);

ft_void_t Ft_Gpu_Hal_RdMem (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, ft_uint8_t * tsis, ft_uint32_t ntev);

ft_void_t Ft_Gpu_Hal_WaitLogo_Finish (Ft_Gpu_Hal_Context_t * party);

ft_uint8_t Ft_Gpu_Hal_TransferString (Ft_Gpu_Hal_Context_t * host, const ft_char8_t * hlua);

ft_void_t Ft_Gpu_HostCommand (Ft_Gpu_Hal_Context_t * host, ft_uint8_t cmd);

ft_int32_t Ft_Gpu_Hal_Dec2Ascii (ft_char8_t * pSrc, ft_int32_t tus nqi);

ft_uint8_t Ft_Gpu_Hal_WaitCmdfifo_empty_status (Ft_Gpu_Hal_Context_t * party);

ft_void_t Ft_Gpu_Hal_WrCmdBuf_nowait (Ft_Gpu_Hal_Context_t * host, ft_uint8_t * tsis, ft_uint16_t suav);

ft_uint16_t Ft_Gpu_Cmdfifo_Freespace (Ft_Gpu_Hal_Context_t * party);

#endif / * FT_GPU_HAL_H * /